EE180 Digital Systems Architecture

Final Exam: The final exam will be held at Shriram 104 on 3/21/2023 from 8:30AM to 11:30AM.

Winter 2023, Mon/Wed 3PM - 4:20PM
Location: 380 - 380X

Instructor: Christos Kozyrakis
Teaching Assistant: Jack Humphries, Mark Zhao, Ian MacFarlane
Ed Discussion: Ed Stem
Staff Email: ee180-win2223-staff@lists.stanford.edu
Gradescope Entry Code: 8N5BK7
Canvas: Canvas Home Page
Course Information: PDF

Office Hours:
Christos: Wednesdays 1:30PM - 2:30PM (and by appointment). Gates 444.
Mark: Mondays 1:00PM - 3:00PM. ZOOM (see Ed for link) 3/20
Ian: Tuesdays 7:00PM - 9:00PM. Packard 104.
Jack: Wednesdays 1:00PM - 3:00PM. Huang Basement.

Overview

EE180 introduces students to computer architecture and the design of efficient computing and memory systems. The key topics of this course include: hardware/software interface (instruction set, data and thread level parallelism), assembly language programming, efficiency metrics (performance, power, energy, and cost), processor design (pipelining and vectors), memory hierarchy (cache, main memory), virtualization, basic I/O, and custom accelerator design. The programming assignments provide an introduction to performance optimization of software on a modern architecture and the design of a processor.
At the completion of the course, you will understand how to determine the performance of processor-based digital systems, why they are designed that way, and how to implement your own accelerator design.
EE180 is appropriate for undergraduate and graduate students who are specializing in the interrelated discipline of hardware/software systems. It is also appropriate for other EE and CS students who want to understand, optimize, or design their own processor based digital-system of any scale in their day-to-day work. Post EE180, students can take EE282, a class on advanced computer system architecture, and modern datacenter hardware/software architecture.

Schedule

Required Textbook

H&P: J. Hennessy & D. Patterson, Computer Organization & Design: The Hardware/Software Interface, 6th edition, Morgan-Kaufmann, 2021.
The book is available at the Stanford Bookstore, and an unlimited-use eBook is available via the Terman Engineering Library. The book is also available in print or digital form by online retailers.

Lectures and Assignments

Date	Topic	Reading Assignment
1/9	Introduction	H&P: 1.{1-5}
1/11	Hardware/Software Interface I	H&P: 2.{1-4, 6}
1/16	MLK Day - No Lecture
1/18	Hardware/Software Interface II	H&P: 2.{7-10}
1/23	Hardware/Software Interface III	H&P: 2.{4, 11-14} H&P: 6.3
1/25	Efficiency Metrics	H&P: 1.{6-7}
1/30	Hardware Design Overview	H&P: Appendix B
2/1	Processor Design	H&P: 4.{1-4}
2/6	Pipelined Processor I	H&P: 4.{5-6}
2/8	Pipelined Processor II	H&P: 4.7
2/13	Pipelined Processor III	H&P: 4.{8-10}
2/15	Memory Hierarchy I	H&P: 5.{1-4}
2/16	[Tentative] Midterm Exam (Online Quiz)
2/20	Presidents' Day - No Lecture
2/22	Memory Hierarchy II	H&P: 5.{8-10}
2/27	Memory Hierarchy III	H&P: 5.10, 6.5
3/1	Custom Accelerators	Lecture Notes
3/6	Virtual Memory	H&P: 5.7
3/8	Operating System Support	H&P: 4.9
3/13	I/O Devices & Interfaces	H&P: 6.9
3/15	I/O Optimizations	Lecture Notes
3/21	Final Exam (8:30AM - 11:30AM)

Review Sessions

The TAs will hold review sessions on most Fridays. These sessions will clarify topics covered during lecture, introduction to homework and laboratory assignments, and review special topics. Attendance is optional, but highly recommended.

Times: Friday 3:00PM – 4:00PM
Location: Hewlett 103

Please fill out the weekly poll on Ed to help us plan the review session!

Date	Topic
1/20	Lab 1 Overview
1/27	Lab 2 Overview
2/3	Verilog and Hardware Design Tutorial
2/10	Lab 3 Overview
2/17	CANCELLED
2/24	Office Hours
3/3	Lab 4 Overview
3/10	Ian's OH

Homework and Projects

We recommend you to work on all assignments in groups of 2 students. All problem sets are due by 11:59pm PDT on the dates indicated on the assignment. Solutions to homework sets will be available online shortly thereafter. All deadlines are final. No extensions, no exceptions. Late assignments will not be accepted. All assignments should be submitted through GradeScope.

Schedule:

Problem Set 1: released 1/30, due 2/13
Problem Set 2: released 2/13, due 2/27
Problem Set 3: released 3/1, due 3/13
Lab 1: released 1/18, due 1/25
Lab 2: released 1/25, due 2/8
Lab 3: released 2/8, due 3/1
Lab 4: released 3/1, due 3/15

Logistics

Announcements: Visit this web page regularly to access all the handouts, solutions, and announcements.

Online Quiz: The midterm exam will be an 1.5-hour open-book quiz. It will be available to take online for a period of 24 hours (you will choose the 1.5 hours that work best for you).

Final Exam: Shriram 104 on 3/21/2023 from 8:30AM to 11:30AM.

Grading Scheme:
Homework: 15%
Class participation : 10%
Lab Assignments: 35%
Midterm exam: 20%
Final exam: 20%

Collaboration: See: honor code and collaboration for some general guidelines, which apply to both project assignments and problem sets. In general, collaboration is encouraged subject to the following guidelines:

No more than 2 people can collaborate on a homework or project assignment.
Students working together should submit a single assignment for the pair.
Any assistance received in the solution of a homework set or programming assignment should be acknowledged in writing with specific details.
No sharing of code, partial or complete solutions among groups is permitted.

Adapted from a template by Andreas Viklund.