Advanced Integrated Circuit Fabrication Processes
Location and Time
Skilling 193, WF 11:00 - 12:15
Graduate students interested in IC process development and integration.
To expose the students to advanced devices and process technology for silicon IC manufacturing.
What are the practical and fundamental limits to the evolution of the technology of modern MOS devices and circuits? How are modern devices and circuits fabricated and what future changes are likely? Advanced techniques and models of device and back end (interconnect and contact) processing. Use of SUPREM for process simulations and PISCES for device simulations. MOS process integration.
Principles and Models of Semiconductor Devices (EE216) and
Integrated Circuits Fabrication Technology (EE212).
- Effects of device scaling on chip performance and reliability
- MOS gates gate dielectric and electrode
- Device isolation
- Shallow junction
- Process integration
- Future technology evolution: SOI, double gate MOS, strained Si, Ge, nanowires, nanotubes, etc.
TEXTBOOKSExtensive class notes are provided by the instructor. No text book is required but following books are useful references
- J. D. Plummer, M. D. Deal and P. B. Griffin, Silicon VLSI Technology Fundamentals, Practice and Models, Prentice Hall, 2000.
- C. Y. Chang and S. M. Sze, ULSI Technology, McGraw Hill Book Com, Year: 1996.
- S. M. Sze, Physics of Semiconductor Devices, Wiley
- Y. Taur and T. Ning, Fundamentals of Modern VLSI Devices, Cambridge Univ Press, 1998.
- R. S. Muller, T. I. Kamins and M. Chan: Device Electronics for Integrated Circuits, Third Edition, John Wiley & Sons, Inc.
- Robert Pierret, Semiconductor Device Fundamentals, Addison-Wesley.
- Wolf, Silicon Processing for the VLSI Era Vol.2: Process Integration, Lattice Press, 1990.
- Wolf and Tauber, Silicon Processing for the VLSI Era Vol.1: Process Technology, Lattice Press, 1986.
Optional Supplementary Journals:
- IEEE Transactions on Electron Devices
- IEEE Electron Device Letters
- Journal of Applied Physics
- Applied Physics Letters
- Journal of the Electrochemical Society
- Journal of Electronic Materials
- Solid State Technology
- Semiconductor International
Hardware and Software Requirements
SUPREM IV, and PISCES software or equivalent commercial versions. All software should already exist on campus computers.
May 12, 2006. The midterm exam requires on campus attendance for local SITN students.
Final design project, no final exam.
Homework 30%, Exam. 40%, Final Project 30%.