Stanford University Department of Electrical Engineering

Computer Systems Colloquium

4:15PM, Wednesday, September 28, 2005
NEC Auditorium, Gates Computer Science Building B03

A Software Configurable Processor Architecture

Ricardo E. Gonzalez
Stretch, Inc.
About the talk:

Software configurable processors are a response to the increasing cost and complexity of integrated circuits. The trends toward short life-cycles and more diverse product families put enormous pressure on circuit design teams to deliver complex SOC's in record times. Unfortunately, few design teams manage to succeed time and time again.

The Software Configurable Processors (or SCP) is a revolutionary new concept in system design. SCP's allow the system designer to tailor a standard microprocessor to her application enabling solutions that are order of magnitude higher performance than the original processor. The designer only has to write C, and can therefore focus on the place where she adds most value, in developing the application. By using a standard solution that can be tailored to their application system designers can reduce risk and time-to-market.

In this presentation I will describe the S5000 microprocessor family, the first implementation of the Software Configurable Processor Architecture developed at Stretch. I will begin by giving a brief summary of the benefits of configuration and the steps required to configure the processor. I will then present some simple application examples that illustrate how configurability translates to performance. And, finally, I will describe in detail the hardware implementation of the processor and the mechanisms required for configuration.

Ricardo Gonzalez has made the SLIDES available in PDF format.

About the speaker:

Dr. Ricardo E. Gonzalez is a member of the technical staff at Stretch Inc., where he leads the development of next-generation Software Configurable Processors. Before joining Stretch he was a member of the technical staff of Tensilica Inc., where he led the development of high-performance and low-power configurable processors cores. Prior to Tensilica he worked at Intel's Microcomputer Research Lab, where he proposed a novel branch architecture for the IA-64 architecture. Dr. Gonzalez received his B.S., M.S., and Ph.D. degrees in Electrical Engineering from Stanford University in 1990, 1992, and 1997, respectively.

Contact information:

Ricardo Gonzalez
777 E. Middlefield Rd.
Mountain View, Ca 94043