Stanford EE Computer Systems Colloquium

4:15PM, Wednesday, September 26, 2006
NEC Auditorium, Gates Computer Science Building B03

The Future Evolution of High-Performance Microprocessors

Norman P. Jouppi
About the talk:

The evolution of high-performance microprocessors has recently gone through a significant inflection point.

First, the power of high performance microprocessors has increased rapidly over the last two decades, even as device switching energies have been significantly reduced by supply voltage scaling. However future voltage scaling will be limited by minimum practical threshold voltages. Current high-performance microprocessors are already near limits of acceptable power dissipation.

Second, the marginal utility of additional single-core complexity has diminished due to a number of factors. Increases in processor clock frequency have stagnated. The competition for higher clock rates has been replaced by a competition for the number of cores per socket.

In this talk we will discuss these issues and propose likely scenarios for the future evolution of high-performance microprocessors.

This talk is an updated version of a Keynote talk given at MICRO 2005.


Download the slides for Norm Jouppi's presentation in PDF format.

About the speaker:

Norman P. Jouppi is a Fellow and Director of the Advanced Architecture Lab at HP Labs in Palo Alto, California.

From 1984 through 1996 he was also a consulting assistant/associate professor in the department of Electrical Engineering at Stanford University. He received his PhD in Electrical Engineering from Stanford University in 1984, and is known for developing widely used prefetching and caching techniques.

He started his career as one of the principal architects and designers of the Stanford MIPS microprocessor.

Later, at DEC he was the principal architect and lead designer of the MultiTitan and BIPS microprocessors. He has also contributed to the architecture and implementation of advanced graphics accelerators, and extensively researched audio, video and physical telepresence.

Norm currently serves as ACM SIGARCH Chair, is a member of the ACM Council, and is on the editorial board of IEEE Computer Architecture Letters. He holds more than 30 U.S. patents, including one designated a Compaq Key Patent. Norm has published over 100 technical papers, with several best paper awards and an ISCA Influential Paper award. He is a Fellow of the IEEE.

Contact information:

Norman P. Jouppi
HP Labs, MS 1181
1501 Page Mill Rd.
Palo Alto, CA 94304