Flash memory holds the promise of revolutionizing data storage and data processing as well. Sadly in the form of the SSD it has always broken this promise in the past. principally flash SSDs have suffered two major problems that have rendered it unusable in any high performance setting, first they have been unable to sustain consistent performance, particularly for random access patterns, second they have suffered from large latency spikes far higher than the promised us access times.
And, some people think flash costs too much.
Violin Memory through a series of architectural innovations has addressed the first two problems, Moore's law (and per core licensing) have dealt with the issue of cost.
This talk will discuss what happens when equipment providing one, two, even three orders of magnitude of increased performance are deployed in the real world, how we are forced to revisit many of our basic assumptions about the nature of storage and some suggestions for promising areas of research and/or new areas for budding entrepreneurs to explore.
Also covered will be an over view of the innovations in the Violin architecture that make this breakthrough performance possible, and finally some entertaining stories from the field, such as the customer who was "trialing" one of our boxes by using it to handle the load of the official web site for a world class sports championship and locked us out of their data center when we came to recover the box at the end of their trial period as well as the many customers who found race conditions in their code had never been triggered until they used Violin storage.
Download the slides for this talk in PDF format.
About the speaker:
|Jon Bennett is the Founder and CTO of Violin Memory and inventor of its switched memory architecture and vRAID technology.|
Jon has a Bachelor of Computer Science degree (with Research Honors) from Carnegie Mellon and a Masters degree from Harvard University, he is an ABD PhD candidate at Harvard from which he has taken a very extended leave to found Violin Memory. In his 20 year career, he has held senior architect positions at Fore Systems, BBN Technologies, Xylan and Motorola. Jon was Chief Engineer at RiverDelta Networks (1999-2001), a company that developed an industry-leading Cable head-end platform (CMTS) and was acquired by Motorola.
He is a Member of the IEEE, his profession activities have included Co-chair 1st SIGCOMM Workshop on Network Troubleshooting (2004) , Member of the Education Board of the IEEE Communication Society (1997), Member of Technical Editorial Board of IEEE Network (1997-2000), Technical Program Committee member for IEEE INFOCOM '98
He is a co-author of the IETF RFC 3246 An Expedited Forwarding PHB for Differentiated Services, multiple conference and journal papers and has 25 issued US patents.
685 Clyde Avenue
Mountain View, CA 94043
email: jcrb (at) @vmem.com