EE384Y: Packet Switch Architectures - II

3 units, Spring 2008

Nick McKeown, Balaji Prabhakar

Lectures: Mon Wed 2:15pm - 3:30pm


Course Description

384X,Y Packet Switch Architectures I: The theory and practice of designing packet switches, such as Internet routers, Ethernet switches and ATM switches. Introduction: evolution of switches and routers. Output scheduling: motivation for providing bandwidth and delay guarantees; fairness; active queue management and packet dropping schemes. Switching: example architectures, performance metrics; unicast switching: blocking phenomena, connections with bipartite graph matching, practical algorithms; unicast switching with speed up; multicast switching. Address lookup: exact and longest prefix matches, performance metrics, hardware and software solutions. Packet classifiers: for firewalls and policy-based routing; graphical description; Theoretical complements: basic queuing models, graph matching algorithms, stability through Lyapunov functions, fluid models.

Note: EE384Y is the second of a two part course being held in Spr 2008.
Prerequisites: EE284/CS244a
Mandatory Prerequisite for EE384Y: EE384X
Recommended: Computer Science 161 and a familiarity with probability (for example, from 178, 278, or Statistics 116.)
3 units, Win, Spr (McKeown, Prabhakar)


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