EE384Y: Packet Switch Architectures - II
3 units, Spring 2008
Nick McKeown, Balaji Prabhakar
Lectures: Mon Wed 2:15pm - 3:30pm
Course
Description
384X,Y Packet Switch Architectures I: The theory and
practice of designing packet switches, such as Internet routers, Ethernet
switches and ATM switches. Introduction: evolution of switches and routers.
Output scheduling: motivation for providing bandwidth and delay guarantees;
fairness; active queue management and packet dropping schemes. Switching:
example architectures, performance metrics; unicast switching: blocking
phenomena, connections with bipartite graph matching, practical algorithms;
unicast switching with speed up; multicast switching. Address lookup: exact and
longest prefix matches, performance metrics, hardware and software solutions.
Packet classifiers: for firewalls and policy-based routing; graphical
description; Theoretical complements: basic queuing models, graph matching
algorithms, stability through Lyapunov functions, fluid models.
Note: EE384Y is the second of a two part course being held in Spr 2008.
Prerequisites: EE284/CS244a
Mandatory
Prerequisite for EE384Y: EE384X
Recommended:
Computer
Science 161 and a familiarity with probability (for example, from 178, 278, or
Statistics 116.)
3 units, Win, Spr (McKeown, Prabhakar)
Grading:
- 50% Project
- 5% Final Proposal
- 10% Intermediate Report
- 10% Presentation
- 25% Final Report
- 30% In-class midterm
- 15% Homeworks (2 h/ws, 2 weeks each)
- 5% Quizzes
Useful
Links
· Here is a Campus Map
Viewers
- If you do not have a PostScript viewer for your
computer, you can get one now.
- If you do not have an Acrobat "pdf" viewer,
you can get
one now.