CONTACT: Stanford University News Service (415) 723-2558
COMMENT: C. Robert Helms, Electrical Engineering (415) 723-0406
Can computer chip makers reduce environmental impact?
STANFORD -- It takes roughly 10 gallons of water to make a single computer chip.
That may not sound like much, but multiply it by the millions of chips made each year, and the result is a large and rapidly growing demand for water. A typical semiconductor factory makes about 2 million integrated circuits per month and gulps about 20 million gallons of water, which ultimately must be disposed of as waste. Chips makers also use large amounts of energy and many toxic chemicals, all of which can harm the environment.
Now a group of Stanford researchers has harnessed one of the industry's own products computer-aided design tools to find ways to reduce the environmental impacts of chip manufacturing while cutting operating costs and improving industry competitiveness.
The group headed by C. Robert Helms, a research professor of electrical engineering has joined forces with researchers at the University of Arizona and the Massachusetts Institute of Technology to form a "virtual center" the Center for Environmentally Benign Semiconductor Manufacturing that will increase significantly the level of basic research in this area in the United States.
"We hope to train a new breed of engineer, one who knows how to design in environmental factors from the beginning," Helms said. "You start with raw materials water, energy, chemical sources. We want to ensure that we do as good a job as possible to minimize the use of these materials and, if we do use them, to recycle them."
Established April 15, the new center will receive $1 million a year for five years from both the National Science Foundation and the Semiconductor Research Corporation, the research arm of the Semiconductor Industry Association. In addition, the center will receive $750,000 in startup funding from Sematech, a consortium of 10 major U.S. semiconductor companies and the U.S. Department of Defense. Another $8 million in matching funds and equipment donations will come from the universities themselves and a number of individual companies.
The center is headquartered at the University of Arizona and is directed by Farhang Shadman, professor of chemical and environmental engineering there. Helms and L. Rafael Reif, professor of electrical and computer engineering at MIT, serve as co-directors. Other members of the Stanford team are James P. McVittie, a research scientist in electrical engineering; Christopher E. D. Chidsey, assocaite professor of chemistry; and Gregory T. Kovacs, assistant professor of electrical engineering.
Although reducing resource consumption and pollution is a primary goal of the researchers, they contend that methods that reduce environmental impacts but add significantly to the cost or complexity of manufacturing processes are unlikely to be put into practice. The group's philosophy, Helms said, is to say, "If we use less of something, we ought to be able to save money at the same time, or develop a process that is simpler or provides a higher throughput."
The groundwork for the center was laid several years ago when Helms and Shadman became involved in a Sematech-funded program.
As part of that program Stanford researchers examined ways to reduce water use in chip manufacture. Turning silicon wafers into chips requires hundreds of steps. The wafers are repeatedly etched, doped and heated to create the millions of transistors and connections that make up an integrated circuit. Every few steps, the wafers must be rinsed in highly purified water to remove surface impurities.
The Stanford researchers created a computer simulation of the equipment, called a wafer cleaning station, that is used in the rinse process. In a typical rinse operation, a cassette containing 50 wafers is lowered into a basin of water, which is rapidly drained and refilled several times. Then the water is allowed to overflow for a period before the cassette is removed, a process that takes about 10 minutes. But the simulations indicated that slowing the rate at which the water drains from the tank would remove surface impurities more effectively.
Engineers at Hewlett-Packard Laboratories agreed to test this qualitative prediction. During four months last winter, they confirmed that making the suggested changes in the cleaning station design and operation could reduce water usage by 80 percent and shorten overall rinse time by several minutes at certain stages in the manufacturing process.
Computer simulations that have enough power to model realistically the physical and chemical processes of this sort are relatively new. "We didn't have the intellectual tools available to perform analyses of this type until recently," Helms said. And the rinse water simulation, among others, has helped convince government and industry engineers that this approach has considerable potential.
Therefore, one of the major goals of the new center is to extend the capabilities of computer-aided design tools to include environmentally important parameters. These tools will make it easier for semiconductor engineers both to modify existing processes to reduce environmental impacts and to create entirely new, environmentally benign processes, the researchers say.
The center researchers have set a number of other objectives for the next two years, including:
Ultimately, this research could have an impact well beyond the computer industry, proponents say. If computer design tools that explicitly model environmental impacts are developed for other types of manufacturing, it should be possible to reduce substantially pollution production in many industries that have many times the environmental impact of the microelectronics industry.
"In many ways, the biggest challenge is educating engineers to realize that designing for the environment is important and can lead to significant productivity benefits," Helms said.
For more information on the Web, see: National Science Foundation news release at
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