Lab Positions:
Project descriptions

Hardware Engineer: The responsibilities of this position include understanding the functionality and specifications of mixed analog–digital ASICs designed in the lab and taking the lead in designing and testing printed circuit boards (PCB) to connect these custom chips with each other and to peripheral circuitry (FPGA, CPLD, SRAM and USB chips). The successful candidate will get the chance to design next-generation hardware and participate in on-going research (e.g., designing an ultra-low power, fully implantable, neuroprosthesis). More information.

Software Engineer: The focus of this position is to map spiking neural networks, specified in easy-to-understand Python scripts, on to our custom hardware platforms that can emulate millions of neurons in real time. Doing so will require learning and understanding the hardware's features and limitations, developing neural-network to hardware mapping algorithms in C++, and refining the network specification language to make it more intuitive for end users. The candidate will lead a team including two software engineers focusing on real-time interaction and on automated testing. Achieving seamless software-hardware interoperation will require creativity in providing an elegant interface, teamwork in improving the existing system architecture, and smartly deciding when and where performance is critical to perform optimizations. More information.

Postdocs: Positions are available for engineers, physicists or computer scientists interested in neuroscience, or for neurobiologists interested in modeling. Joint appointment in the Moore or Shenoy labs, among others, is also an option. Contact Prof. Boahen to propose a project, or to find out more about those listed below.

: Rotations are available to participate in several on-going projects, some of which are listed below. Contact Prof. Boahen to find out more, or to propose an idea. A good way to get exposed to large-scale modeling is taking BIOE332.

Undergrads: For research experience, contact a lab-member directly to express your interest in working on his or her project. When applying to Stanford for grad school, chose the program that suits your career objectives. Our lab, like others at Stanford, has a mix of students from various departments (Bioengineering, Neuroscience, EE/CS, etc.).

Title Description Requirements
Motor Control
In collaboration with Oussama Khatib
You can carry a cup of coffee, talk on your cell phone, and maintain a upright posture, all at the same time. How does the brain coordinate the hundreds of muscles involved and resolve any potential conflicts on the fly? Address this question through theoretical and MRI studies.
Knowledge of control theory and exposure to neurobiology of movement.
Visual Attention
In collaboration with Tirin Moore
There are three dozen cortical areas in the visual system alone. How are their distict representations of the visual world integrated into a single coherent percept? Explore this question in a model of two reciprocally connected cortical areas (e.g., FEF and V4).
Knowledge of image processing and exposure to systems neuroscience.

Title Description Requirements
In collaboration with Krishna Shenoy
Build an ultralow power brain-machine-interface decoder by using a neuromorphic chip to translate neural signals recorded from motor cortex into appropriate commands for a computer cursor or robotic arm.
You should understand control theory algorithms (like the Kalman Filter) and be familiar with neural networks.
In collaboration with Philip Wong
Design a learning chip that uses novel devices—the goal is to replace our 23-transistor-circuit for spike-timing-dependent plasticity with a single nanoscale device.
You should understand how solid-state devices work. Knowing simulation and fabrication tools are pluses.
Demonstrate that silicon neurons based on a versatile silicon model of ion-channel populations work when built out of nanoscale transistors that behave stochastically.

You should understand how analog CMOS circuits work. Knowing simulation and layout tools are pluses.

Interchip Communication
Design and layout asynchronous digital logic to route spikes between 2-D arrays of silicon neurons, an integral part of any neuromorphic chip.
You should understand how digital CMOS circuits work. Knowing simulation and layout tools are pluses.
On-chip DAC
Design and layout a DAC to serve as a programmable bias-voltage generator, allowing us to tune our silicon neurons and synapses after they are fabricated—and make their behavior independent of temperature.
You should understand how analog and digital CMOS circuits work. Knowing simulation and layout tools are pluses.
On-chip ADC
Design and layout an ADC to serve as an on-chip oscilloscope, allowing us to probe any silicon neuron or synapse on the chip (through a scanner).

You should understand how analog and digital CMOS circuits work. Knowledge of simulation and layout tools are all pluses.

PCB Design
Design and assemble a PCB to test a neuromorphic chip, or to add functionality by reprogramming the FPGA on an existing board (e.g., implement a weighted connection as a probability of delivering the spike).
You should be comfortable hacking hardware. Familiarity with CPLDs or FPGAs is a plus.
Chip Calibration
Devise an automated procedure to collect and analyze data from thousands of silicon neurons in order to automate mapping software models onto neuromorphic chips.
You should be comfortable with MatLab. Familiarity with C/C++ is a plus.