Alireza Dastgheib

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BSEE, Tehran University, 2005
MSEE, Stanford University, 2007
Admitted to Ph.D. Candidacy: 2006-2007

Research: High-Precision Calibration ADCs

This research demonstrates an example of leveraging DSP in the design of high-speed digital-to-analog converters (DACs). The procedure is to accurately capture the output of a DAC and use that data to identify its nonlinearity and construct a predistorter to linearize the overall system. The first goal of this project is the design of an appropriate analog-to-digital converter (ADC) to sense the DAC output. The required ADC should maintain high linearity across the DAC bandwidth while imposing small power and area overhead. A cyclic ADC with above criteria has been designed and fabricated in 90-nm technology and is currently under test. The other aspect of the research is the optimization of the DSP calibration algorithm. A two-step algorithm running in software has already been developed and tested. The next step is to design an iterative algorithm with lower computational cost that is suitable for hardware implementation.

Alireza research.png

Email: alirezad AT stanford DOT edu

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