Cadence Program

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Cadence Software at Stanford University
Cadence University Program Member

List of Cadence Software Available
o Virtuoso Platform
- Schematic Capture
- Layout
- Layout XL
- Custom Placer
- Custom Router
- Chip Assembly Router
o SoC Encounter
o Encounter Test
o System-In-Package
o Assura

Research Groups Using Cadence Tools
Wooley Group
Horowitz Group
Tom Lee Group
Simon Wong Group
Murmann Group
Ada Poon Group
Mitra Group
Dally Group
Arbabian Group

Courses Using Cadence Tools
EE313 Digital MOS Integrated Circuits
EE314A RF Integrated Circuit Design
EE314B Advanced RF Integrated Circuit Design
EE371 Advanced VLSI Circuit Design
EE315A VLSI Signal Conditioning Circuits
EE315B VLSI Data Conversion Circuits

Cadence Tool Help at Stanford

Information is provided 'as is' without warranty of any kind. No statement is made and no attempt has been made to examine the information, either with respect to operability, origin, authorship, or otherwise. Please use this information at your own risk. We recommend using it on a copy of your data to be sure you understand what it does under your conditions. Keep your master intact until you are satisfied with the use of this information within your environment.

Cadence is a registered trademark of Cadence Design Systems, Inc., 2655 Seely Avenue, San Jose, CA 95134

Last Modified: 08/02/2013
Webpage Maintained By: Man-Chia Chen (Email: manchiac AT stanford DOT edu)

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