Valerie Barry

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BSEE University of Idaho, May 2012


vbarry AT stanford DOT edu


My current research is focused on the design of front-end electronics for radiation detectors and is carried out at the RED Integrated Circuits Department of the SLAC National Accelerator Laboratory. SLAC has been designing state-of-the-art detectors for particle physics, astrophysics and photon science. To enable pump probe experiments at synchrotron facilities, SLAC is designing a hybrid pixel detector configured as a dual gate photon counter with multiple thresholds named cPix2. In pump probe experiments matter is probed under different exited states by means of a laser beam (pump).

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The pixel architecture (Fig. 1) is composed by a fast shaper-less charge preamplifier that integrates the input charge generated in a silicon sensor by x-ray photons, a multi-threshold comparator detecting the arrival of the incoming events and two gates (counters) counting them under two possible excitation conditions (pump on, pump off). Within the project my actual research goal is to study and optimize architecture for the charge preamplifier and its reset system and to implement the dual counters.

The charge amplifier design presents several challenges as it requires to process signals in 48ns with minimum noise and power consumption. Gain needs to be sufficient to extract the full charge from the sensor. Area is limited by the maximum pixel size of 100x100 um2. The counters occupy almost half of the pixel area.

Because of these specification aspects like limited pixel area, low-noise, and low-power are critical for this project.

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