Aldo Peña Perez

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&nbsp; &nbsp; Current trends in integrated circuits and transducer technologies push ultrasound array imaging systems in the directions of full-scale real-time volumetric (3-D) imaging using conventional 2-D arrays with thousands of elements. Design of low-cost and compact beamformers is therefore crucial for realization of such systems, where reducing the cost, size, and power consumption of the front-end is critically important. <br>&nbsp; &nbsp; On the other hand, recent advances in nanometer technologies have made single-bit ΣΔ ADCs more and more attractive for the design of digital beamformers since can be easily integrated onto the same chip as the processing circuitry creating the beam. Thus, interconnections, size, and power consumption are dramatically reduced. <br>&nbsp; &nbsp; Due to the large dynamic range necessary for ultrasound applications, the discrete-time ΣΔ ADC performs a third order noise shaping behavior to maintain adequate signal-to-noise ratio. The amplifier, a key analog building block in SC circuits, does not utilize classical low-voltage OTA topologies since could be replaced with inverter-based architectures. In spite of the limited performance of inverters compared with OTAs, inverters attract attention for their inherent advantages such as simplicity, rail-to-rail operation, scalability with technology and capability to operate with very low supply voltages. <br>  
&nbsp; &nbsp; Current trends in integrated circuits and transducer technologies push ultrasound array imaging systems in the directions of full-scale real-time volumetric (3-D) imaging using conventional 2-D arrays with thousands of elements. Design of low-cost and compact beamformers is therefore crucial for realization of such systems, where reducing the cost, size, and power consumption of the front-end is critically important. <br>&nbsp; &nbsp; On the other hand, recent advances in nanometer technologies have made single-bit ΣΔ ADCs more and more attractive for the design of digital beamformers since can be easily integrated onto the same chip as the processing circuitry creating the beam. Thus, interconnections, size, and power consumption are dramatically reduced. <br>&nbsp; &nbsp; Due to the large dynamic range necessary for ultrasound applications, the discrete-time ΣΔ ADC performs a third order noise shaping behavior to maintain adequate signal-to-noise ratio. The amplifier, a key analog building block in SC circuits, does not utilize classical low-voltage OTA topologies since could be replaced with inverter-based architectures. In spite of the limited performance of inverters compared with OTAs, inverters attract attention for their inherent advantages such as simplicity, rail-to-rail operation, scalability with technology and capability to operate with very low supply voltages. <br>  
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Revision as of 12:42, 31 July 2013

Aldo 300dpi.jpg

Short Bio

Aldo Peña Perez was born in Queretaro, Mexico, in 1981. Received the B. Sc. degree on Electronics Engineering from the Technological Institute of Queretaro, Mexico, in 2004. Received the M. Sc. degree from the National Institute of Astrophysics, Optics and Electronics (INAOE), Puebla, Mexico, in 2006 and Ph. D. degree from the University of Pavia, Italy, in 2010. During his Ph.D., he was involved on development, design and testing of low-power high-resolution sigma delta modulators. From 2010 to 2011 he joined the Integrated Micro-Systems Laboratory of the University of Pavia as postdoctoral research fellow. During 2012-2013 he worked for STMicroelectronics, Milan, Italy as analog engineer at the Body and Audio Division (BAD). He is currently a postdoctoral researcher with the Murmann Mixed-Signal Group at Stanford University, Stanford, CA. His main research activities include mixed signal design, in particular low-voltage, low-power oversampled data converters and analog amplifiers.






Projects

INVERTER-BASED SIGMA-DELTA (ΣΔ) MODULATOR FOR PORTABLE 3D MEDICAL ULTRASOUND SYSTEM   

    Current trends in integrated circuits and transducer technologies push ultrasound array imaging systems in the directions of full-scale real-time volumetric (3-D) imaging using conventional 2-D arrays with thousands of elements. Design of low-cost and compact beamformers is therefore crucial for realization of such systems, where reducing the cost, size, and power consumption of the front-end is critically important.
    On the other hand, recent advances in nanometer technologies have made single-bit ΣΔ ADCs more and more attractive for the design of digital beamformers since can be easily integrated onto the same chip as the processing circuitry creating the beam. Thus, interconnections, size, and power consumption are dramatically reduced.
    Due to the large dynamic range necessary for ultrasound applications, the discrete-time ΣΔ ADC performs a third order noise shaping behavior to maintain adequate signal-to-noise ratio. The amplifier, a key analog building block in SC circuits, does not utilize classical low-voltage OTA topologies since could be replaced with inverter-based architectures. In spite of the limited performance of inverters compared with OTAs, inverters attract attention for their inherent advantages such as simplicity, rail-to-rail operation, scalability with technology and capability to operate with very low supply voltages.


3D Ultrasound System.jpg

FEEDBACK CONTROL CIRCUIT FOR THE DC ELECTROCHEMICAL FABRICATION OF SCANNING TUNNELING MICROSCOPY (STM) MICROTIPS    

    The scanning tunneling microscopy (STM) is a type of electron microscope that shows three-dimensional images of a sample. Based on the electron tunneling effect, the STM works by scanning a very sharp microtip over a surface, providing an extraordinarily high resolution due to the exponential dependence of the measured tunneling current on the tip-sample distance.
    The sharpness of the microtip is an important parameter since its quality dramatically affects the reliability of the STM imaging process and its strongly related to the fabricating method. The tip is usually prepared by the “drop-off” method, which is based on the electrochemical etching process. For the purpose of producing a tip as sharp as possible, on this standard technique the etching current is cut-off as soon as the part of the material wire immersed in the electrolyte drops off due its own weight, so that the tip radius is kept at a minimum. With a cut-off time as short as 50ns, is possible obtaining a tip radius as small as 10nm.
    Since the etching current decreases abruptly once the sharp tip is formed, a feedback control circuit takes place to accomplish two main tasks: first, the electrolytic current is cut-off accurately by opening the voltage etching supply and second, the possible residual current resulting from the etching process is shunted away from the cell. Currently, an improved feedback control circuit for the DC electrochemical fabrication of metallic tips is under development. The circuit is capable to control the fabricating process accurately with cut-off times in the state-of-art solutions (~40ns-50ns).


STM CutOff Circuit Principle.jpg





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