I am a sixth year Ph.D. student at Stanford University. I completed my joint B.Tech.-M.Tech. degree in Electrical at Indian Institute of Technology (IIT) Madras in India. My research interests include virtual reality, light fields, deep learning using convolutional neural networks, and designing keypoint detectors and descriptors for feature matching and registration for novel data modalities. I am currently working in Stanford's Image Video and Multimedia Systems (IVMS) Lab on live-action virtual reality with motion parallax, data representations for virtual reality, and the impact of motion parallax and binocular vision on viewer preference and subjective visual perception in virtual reality.

Education

2014-Present
Stanford University
Ph.D Electrical Engineering
CGPA: 3.97 / 4.0 [Transcript]
2009-2014
Indian Institute of Technology (IIT) Madras, India
B.Tech.-M.Tech. (joint) Electrical Engineering
Minor: Economics
CGPA: 9.37 / 10.0 [Transcript]

Philips India Award for highest cumulative GPA in Electrical Engineering at the time of graduation

Research

2014-Present
Stanford University, Ph.D. Student
Advisor (2015-present): Prof. Bernd Girod
Area: Virtual reality, light fields, computer graphics
Project: Data representations for live-action virtual reality with motion parallax, real-time six degrees of freedom 360 rendering, effects of motion parallax and binocular stereopsis on viewer preference and subjective visual perception in virtual reality
2012-2014
Indian Institute of technology (IIT) Madras, M.Tech. Student
Advisor: Dr. Shankar Balachandran
Area: Fourier Transform on Galois Field, digital logic synthesis, discrete math
Project: Predicting the post-synthesis complexity of digital logic using Fourier Transform on Boolean Cube [Master Thesis]

Awards

December 2017
SCIEN Distinguished Poster Award by NVIDIA
J. Thatte, B. Girod, "Stacked OmniStereo for Virtual Reality with Six Degrees of Freedom" [Poster]
September 2016
IEEE SPS Best Conference Paper for Industry
J. Thatte, J. -B. Boin, H. Lakshman, G. Wetzstein, B. Girod, “Depth Augmented Stereo Panorama for Cinematic Virtual Reality with Focus Cues”, IEEE International Conf. on Image Processing (ICIP), 2016. [Abstract] [Webpage] [PDF] [Supplement] [Award]
December 2015
SCIEN Distinguished Poster Award by Apple
J. Thatte, B. Girod, "Depth Augmented Stereo Panorama for Cinematic Virtual Reality" [Poster]
July 2014
Philips India Award for highest cumulative GPA at the time of graduation with B.Tech-M.Tech dual degree in electrical engineering
October 2013
Ranked in top 3 nationwide (from 300 teams) in GS Quantify, a modeling and problem solving contest held by Goldman Sachs in India.
[Contest Problems] [Final Presentation]
October 2008
Represented India and won a silver medal at the XIII International Astronomy Olympiad, Trieste, Italy among teams from 22 countries

Publications

J. Thatte, B. Girod, “A Statistical Model for Disocclusions in Depth-based Novel View Synthesis”, IEEE Conference on Visual Communications and Image Processing, 2019.
J. Thatte, B. Girod, “The Effect of Motion Parallax and Binocular Stereopsis on Viewer Preference and Size Perception in Virtual Reality”, European Conference on Computer Vision (ECCV), Workshop on 360-Degree Perception and Interaction, 2018.
J. Thatte, B. Girod, “Towards Perceptual Evaluation of Six Degrees of Freedom Virtual Reality Rendering from Stacked OmniStereo Representation”, Photography, Mobile, and Immersive Imaging Conference, Electronic Imaging Symposium, 2018.
J. Thatte, T. Lian, B. Wandell, B. Girod, “Stacked Omnistereo for Virtual Reality with Six Degrees of Freedom”, IEEE Visual Communications and Image Processing (VCIP), 2017.
-- Recipient of IEEE SPS Best Paper Award for Industry --

J. Thatte, J. -B. Boin, H. Lakshman, G. Wetzstein, B. Girod, “Depth Augmented Stereo Panorama for Cinematic Virtual Reality with Focus Cues”, IEEE International Conference on Image Processing (ICIP), 2016.
J. Thatte, J. -B. Boin, H. Lakshman, B. Girod, “Depth Augmented Stereo Panorama for Cinematic Virtual Reality with Head-Motion Parallax”, IEEE International Conference on Multimedia and Expo (ICME), 2016.

Projects by Research Area

Cinematic Virtual Reality, Head-motion Parallax, and Visual Perception [Details]
Deep Learning [Details]
Features, Descriptors, and Registration [Details]
Astrophysics [Details]
Modeling and Algorithms [Details]

Teaching

Winter 2018
Stanford University
EE368: Digital Image Processing [Website]
Teaching Assistant
Fall 2013
Indian Institute of Technology (IIT) Madras, India
Analog Circuits [Website]
EC3102: Teaching Assistant

Experience

June-September 2016
Cupertino, CA, USA
Apple Inc.
Position: Software Engineering Intern
Keywords: Deep Learning, Novel View Synthesis
Project: Worked on developing an algorithm for high-quality novel view synthesis with constrains on total computation. Combined deep learning with classical methods to minimize computation while maintaining the image quality.
May-July-2013
Singapore
Barclays Bank PLC
Position: Quantitative Strategist Intern
Keywords: Statistics, Modelling, Finance
Project: Developed a method for predicting profitability of prospective bonds transactions by modeling market movement. Devised a strategy for profitable hedging and identified client groups with potential for revenue enhancement.
May-July-2012
Dresden, Germany
Technical University Dresden
Position: Research Intern (advised by Prof. Gerard Fettweis)
Keywords: Wireless Communication, Cognitive Radio, Femtocells
Project: Developed an algorithm for cognitive interference management in user-deployed femtocell networks. Each femtocell adjusted its power and frequency in a distributed manner thereby reducing the overall outage probability for end-users and substantially increasing the total network capacity.
May-July-2011
Pune, India
Bitmapper VLSI Solutions
Position: Intern
Keywords: Digital systems design, FPGA
Project: I developed an FPGA-based QDR controller IP designed for fast operation and achieved a data transfer rate of 100MBps. I also developed an IP to interface Xilinx FPGA with TI DSP using EMIF bus for high speed signal processing applications. Both the IPs were developed in VHDL and delivered to the client at the end of the internship. [PDF]

Skills

Programming
Python, MATLAB, OpenGL, CUDA, C++, Unity3D
Languages
English
Hindi
Marathi
German
Native/multilingual
Native/multilingual
Native/multilingual
Basic

Contact

Email
jayantt [at] stanford [dot] edu
Office
Stanford University, David Packard Electrical Engineering, 350 Serra Mall #353, Stanford, CA, 94305

Last updated on May 02, 2020