EE282: Computer Systems ArchitectureWinter 2020, Tue/Thu 12:00 PM - 13:20 PM, room Thornt Center 102
EE282 focuses on key topics in advanced computer systems architecture such as multilevel in memory hierarchies, advanced pipelining and super scalar techniques, vectors, GPUs and accelerators, non-volatile storage and advanced IO systems, virtualization, and datacenter hardware and software architecture. The programming assignments provide an introduction to performance analysis and optimization techniques for computer systems. At the completion of the course, you will understand how computer systems are organized and, why they are organized that way, and what determines their performance. You will also understand the rich interactions between the hardware and software layers in modern systems.
EE282 is appropriate for undergraduate and graduate students specializing in the broad field of computer systems. It is also appropriate for other EE and CS students who want to understand, program, and make efficient use of modern computer systems of any scale in their day-to-day work.
Post EE282, students can take CS316, a research seminar on advanced computer architecture based on recent papers, or CS349d, a seminar that covers the software infrastructure of cloud computing and large-scale datacenters.
- (2/7) We just released a sample midterm for practice. You may skip a question if we haven't covered the material in our class.
- (2/6) Programming Assignment 1 released, due 2/20. Please check your Stanford email for Google Cloud credits information, and follow GCE Setup Instructions to set up the environment.
- (2/3) The midterm will happen on Thursday (2/13), 6 - 8 pm, room 380-380c. Please email the instructor and TA if you cannot attend. We will arrange alternative exams only for legitimate conflicts with other Stanford classes or documented health problems, family emergency, etc.
- (1/31) We created a summary of Problem Set 2 clarification on Piazza. Please stay tuned for updates!
- (1/28) Problem Set 2 released, due 2/13.
H&P: J. Hennessy & D. Patterson, Computer Architecture: A Quantitative Approach, 6th edition.
M/C: Morgan Claypool Synthesis Lectures (available through the library using your SUNet id).
|Date||Topic||Reading Assignment||Class Notes|
|1/7||Introduction & Review of Prerequisites||H&P 6: Appendix B & C||Slides|
|1/9||Advanced Caches 1: Multilevel, Optimizations||H&P 6: Chapter 2, and Appendix B||Slides|
|1/14||Advanced Caches 2: Prefetching, Coherency
||H&P 6: Chapter 2, and Appendix B||Slides|
|1/16||Advanced Memory Management||H&P 6: Appendix L||Slides|
|1/21||Main Memory (including HBM)||H&P 6: Section 2.2||Slides|
|1/23||Dynamic Scheduling and Branch Prediction||H&P 6: Sections 3.3-3.5||Slides|
|1/24||Review Session 1 (Gates B03, 1:30 - 2:20 pm)||Problem Set 1, Lectures 1-5||Slides|
|1/28|| Speculation and Superscalar
||H&P 6: Sections 3.6, 3.8, 3.9||Slides|
|1/30||Multithreading||H&P 6: Sections 3.11-3.12||Slides|
|1/31||Review Session 2 (Gates B03, 1:30 - 2:20 pm)||Problem Set 2, Lectures 3, 6-8||Slides|
|2/4||Memory Consistency, Synchronization,
|H&P 6: Sections 5.4-5.6||Slides|
||H&P 6: Sections 4.2, 4.5||Slides|
|1/31||Midterm Review (Gates B03, 1:30 - 2:20 pm)||Lectures 1-10||Slides|
Guest Lecturer: Jack Choquette (NVIDIA)
H&P 6: Section 4.4
Guest Lecturer: Nishant Patil (Google)
H&P 6: Sections 7.1-7.4
|2/13||Midterm Exam (6 - 8 pm, room 380-380c)||Lecture 1 - 10. Past midterm: Winter 2019 (solution)|
|2/18||Non-Volatile Storage||H&P 6: Appendix D.2,
Flash storage memory by Adam Leventhal
||H&P 6: Appendix F.1, F.2|
|2/25||Virtualization||M/C Principles of Secure Processor Architecture Design:
Sections 2.1, 2.2, 3.1, 3.2 Chapter 6
|2/27||Virtualization (cont.)||M/C: Principles of Secure Processor Architecture Design,
Sections 2.1, 2.2, 3.1, 3.2 Chapter 6
|3/3||Datacenter Hardware||H&P: Sections 6.1-6.4, 6.7|
|3/5||Datacenter Management||M/C The Datacenter as a Computer 3rd ed: Chapter 2,
Large-Scale Cluster Management At Google With Borg,
Tail at Scale
|3/10||Large-Scale Storage and Reliability||M/C Datacenter as a Computer 3rd ed:
Sections 1.6.2, 3.4, 3.5, Chapter 7
|3/12||Security: Enclaves, Side Channel Attacks||M/C Principles of Secure Processor Architecture Design:
Sections 2.1, 2.2, 3.1, 3.2, Chapter 6
|3/20||Final Exam (Thornt Center 102, 12:15 - 3:15 pm)|
You will work on all assignments in groups of 2 students. All assignments are due by 5:00pm on the dates indicated on the assignment. Solutions to homework sets will be available online shortly thereafter. All deadlines are final. No extensions, no exceptions. Late assignments will not be accepted. All assignments should be submitted through GradeScope.
Problem Set 1: release 1/14, due Tuesday 1/28
- Problem Set 2: release 1/28, due Thursday 2/13
- Programming Assignment 1: release 2/6, due Thursday 2/20
- Problem Set 3: release 2/18, due Tuesday 3/3
- Programming Assignment 2: release 2/20, due Thursday 3/12
Announcements: Visit this web page regularly to access all the handouts, solutions, and announcements.
Christos Kozyrakis: Tue 10:45 - 11:45am at Gates 350 (or by appointment).
Qian Li: Wed 10:45 - 11:45am at Gates 315 (or by appointment).
The midterm will be scheduled for an evening during the week of Feb 10th. A poll will be created for scheduling.
The final is scheduled for Friday, March 20th, 12:35 – 3:35 pm.
Grading: Read the material for each lecture, ask questions, participate (5%); 3 problem sets (15%); 2 programming assignments (20%); Midterm exam (30%); Final exam (30%)
Collaboration: See: honor code and collaboration for some general guidelines, which apply to both project assignments and problem sets. In general, collaboration is encouraged subject to the following guidelines:
- No more than 2 people can collaborate on a homework or project assignment.
- Students working together should submit a single assignment for the pair.
- Any assistance received in the solution of a homework set or programming assignment should be acknowledged in writing with specific details.
- No sharing of code, partial or complete solutions among groups is permitted.
SCPD Video Recording Disclaimer: Video cameras located in the back of the room will capture the instructor presentations in this course. For your convenience, you can access these recordings by logging into the course Canvas site. These recordings might be reused in other Stanford courses, viewed by other Stanford students, faculty, or staff, or used for other education and research purposes. Note that while the cameras are positioned with the intention of recording only the instructor, occasionally a part of your image or voice might be incidentally captured. If you have questions, please contact a member of the teaching team.
Adapted from a template by Andreas Viklund.