Evaluation of the Tensor Processing Unit: A Deep Neural Network Accelerator for the Datacenter

and

Q&A and Panel: The Future of Computer Architecture

David Patterson (Google)
John Hennessy (Knight-Hennessy Scholars Program)

Evaluation of the Tensor Processing Unit: A Deep Neural Network Accelerator for the Datacenter (Patterson)

With the ending of Moore's Law, many computer architects believe that major improvements in cost-energy-performance must now come from domain-specific hardware. The Tensor Processing Unit (TPU), deployed in Google datacenters since 2015, is a custom chip that accelerates deep neural networks (DNNs). We compare the TPU to contemporary server-class CPUs and GPUs deployed in the same datacenters. Our benchmark workload, written using the high-level TensorFlow framework, uses production DNN applications that represent 95% of our datacenters's DNN demand. The TPU is an order of magnitude faster than contemporary CPUs and GPUs and its relative performance per Watt is even larger.

About the Panel/Q&A (11:30-12:00):

The Future of Computer Architecture (Patterson and Hennessy)

General Information:

This presentation is the last lecture of EE180 for Winter 2017. The lecture is open to the public. The lecture will not be video recorded nor available on the web.

EE380 students and attendees are urged to attend this lecture, but it is optional. It cannot be substituted for one of the ten required EE380 lectures.

Venue:

The lecture will be in Cubberly Auditorium, School of Education Building, Stanford. This MAP will help you find the site if you are unfamliliar with the Stanford Campus.

About the speakers:

Patterson Bio: After 40 years as a UC Berkeley professor, David Patterson retired in 2016 and joined Google as a distinguished engineer. He has been Chair of Berkeley's CS Division, Chair of the Computing Research Association, and President of the Association for Computing Machinery. His most successful research projects have been Reduced Instruction Set Computers (RISC), Redundant Arrays of Inexpensive Disks (RAID), and Network of Workstations. All helped lead to multibillion-dollar industries. This research led to many papers, six books, and about 40 honors, including election to the National Academy of Engineering, the National Academy of Sciences, the Silicon Valley Engineering Hall of Fame, and Fellow of the Computer History Museum. He shared the IEEE von Neumann Medal and the NEC C&C Prize with John Hennessy, past president of Stanford University and co-author of two of his books.

Hennessy Bio: John Hennessy initiated the MIPS project at Stanford in 1981, MIPS is a high-performance Reduced Instruction Set Computer (RISC), built in VLSI. MIPS was one of the first three experimental RISC architectures. In addition to his role in the basic research, Hennessy played a key role in transferring this technology to industry. During a sabbatical leave from Stanford in 1984-85, he cofounded MIPS Computer Systems (later MIPS Technologies Inc. and now part of Imagination Technologies), which specializes in the production of chips based on these concepts. He also led the Stanford DASH (Distributed Architecture for Shared Memory) multiprocessor project. DASH was the first scalable shared memory multiprocessor with hardware-supported cache coherence. More recently, he has been involved in FLASH (FLexible Architecture for Shared Memory), which is designed to support different communication and coherency approaches in large-scale shared-memory multiprocessors. In the 1990s, he served as the Founding Chairman of the Board of Atheros, an early wireless chipset company, now part of Qualcomm. Hennessy is also the coauthor of two widely used textbooks in computer architecture. In addition to his work as a Professor at Stanford, he has served as Chair of the Department of Computer Science (1994-96), Dean of the School of Engineering (1996-99), Provost (1999-2000), and President (2000-2016). He is currently the Director of the Knight-Hennessy Scholars Program, which each year will select 100 new graduate scholars from around the world to receive a full scholarship (with stipend) to pursue a wide-ranging graduate education at Stanford, with the goal of developing a new generation of global leaders.