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About the speaker:
H.-S. Philip Wong Professor of Electrical Engineering Stanford University, Stanford, California 94305, U.S.A. Address: Center for Integrated Systems Room CISX 312 Stanford University Stanford, CA 94305-4075 Email: hspwong@stanford.edu Phone: +1-650-725-0982 URL: http://www.stanford.edu/~hspwong Biography: H.-S. Philip Wong joined Stanford University as Professor of Electrical Engineering in September, 2004. From 1988 to 2004, he was with the IBM T.J. Watson Research Center. He held various positions from Research Staff Member to Manager, and Senior Manager. While he was Senior Manager, he had the responsibility of shaping and executing IBM’s strategy on nanoscale science and technology as well as exploratory silicon devices and semiconductor technology. His present research covers a broad range of topics including carbon nanotubes, biosensors, self-assembly, exploratory logic devices, nanoelectromechanical relays, device modeling, and novel memory devices such as phase change memory and metal oxide resistance change memory. He is a Fellow of the IEEE and served on the Electron Devices Society AdCom as elected member (2001 – 2006). He served as the Editor-in-Chief of the IEEE Transactions on Nanotechnology in 2005 – 2006, sub-committee Chair of the ISSCC (2003 – 2004), General Chair of the IEDM (2007), and is currently a member of the Executive Committee of the Symposia of VLSI Technology and Circuits (2007 – 2010). He received the B.Sc. (Hons.), M.S., and Ph.D. from the University of Hong Kong, Stony Brook University, and Lehigh University, respectively. He currently holds the Chair of Excellence of the French Nanosciences Foundation.
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