Research
September 2024 – Present
This is my primary research direction as a Ph.D. student, where I work under the guidance of Prof. Thierry Tambe and collaborators throughout the Computer Science and Electrical Engineering departments at Stanford.
DAM (Differentiated Access Memories) is a five-year project at Stanford University to research and define how future computers will manage memory as a heterogeneous resource with different tradeoffs.
I am interested in tackling the “memory wall” problem in the AI/ML fields, where the surging size of AI models demands more on-chip memory to store intermediate results, optimizing spatial and temporal locality and improving energy efficiency.
However, even as the rest of the logical circuits continue to scale down with more advanced process nodes, the density of SRAM has not been keeping pace, leading to the risk where memory may dominate the area and power budgets of future AI accelerators.
This points to a renewed interest in alternative on-chip memory devices that provide higher density and improved fJ/bit efficiency.
My lab and I argue that the future of memory will evolve from a uniform address space to a heterogeneous collection of different memories optimized for different uses.
Our research seeks to answer: What new memory technologies will we need, how do we compose them in systems, and what caching mechanisms do they need? How can applications and algorithms guide the composition of heterogeneous memories? How will software present and manage heterogeneous memories?
My contributions to this overarching research direction include, chronologically:
- GainSight: Given 2T/3T gain cells as SRAM alternatives with higher density but limited retention times, as well as the prospects of composing different memory devices into heterogeneous on-chip memory hierarchies, I developed GainSight, the first comprehensive, open-source framework that aligns dynamic workload lifetime profiles with memory device characteristics to generate optimal on-chip cache compositions in accelerators, enabling our lab to explore the design space of heterogeneous memory hierarchies for upcoming architecture designs.
- Position papers on the Future of Memory and Towards Memory Specialization (DIMES ‘25): I co-authored two position papers that argue for a paradigm shift in memory architectures away from uniform memory hierarchies toward specialized memory architectures that exploit application-specific access patterns and data lifetime characteristics, proposing long-term RAM (LtRAM) and short-term RAM (StRAM) as new memory classes with explicit OS support.
- OpenGCRAM: Contributing to an open-source Gain Cell memory compiler for generating GCRAM designs with customizable retention times for AI workloads.
Undergraduate-level Research
Many of my research experiences prior to Stanford were done at the University of Michigan as an undergraduate student through the U-M’s Civil and Environmental Engineering department and the University of Michigan Transportation Research Institute (UMTRI).
This project encompassed my research work done under the guidance of Prof. Neda Masoud at the University of Michigan Center for Connected and Automated Transportation.
The overarching objective of this research project is “to develop a holistic framework that integrates physics-based data-driven modeling and dynamic decision making under uncertainty and partial information to improve cybersecurity in connected and automated vehicles (CAV).”
UMTRI Bioscience Group, February 2022 – August 2022
I worked as a research assistant at the University of Michigan Transportation Research Institute’s Biosciences Group over the Winter, Spring, and Summer 2022 terms.
My group primarily “conducts research on the biomechanics of motor vehicle occupants as it relates to occupant injuries, crash protection, and occupant accommodation.”
Publications, Preprints and Conference Presentations
Published in Workshop on Disruptive Memory Systems (DIMES 25), 2025
A paradigm shift from simple memory hierarchies toward specialized memory architectures that exploit application-specific access patterns, proposing long-term RAM (LtRAM) and short-term RAM (StRAM).
Recommended citation: Peijing Li, Muhammad Shahir Abdurrahman, Rachel Cleaveland, Sergey Legtchenko, Philip Levis, Ioan Stefanovici, Thierry Tambe, David Tennenhouse, Caroline Trippel, and H.-S. Philip Wong. 2025. Towards Memory Specialization: A Case for Long-Term and Short-Term RAM. In Workshop on Disruptive Memory Systems (DIMES ’25), October 13, 2025. Association for Computing Machinery, Seoul, Korea (South), 10. https://doi.org/10.1145/3764862.3768175 https://doi.org/10.1145/3764862.3768175
Published in arXiv preprint, 2025
A reconsideration of proposed system architectures with huge shared memories, arguing instead for breaking memory into smaller slices tightly coupled with compute elements.
Recommended citation: Samuel Dayo, Shuhan Liu, Peijing Li, Philip Levis, Subhasish Mitra, Thierry Tambe, David Tennenhouse, and H.-S. Philip Wong. 2025. The Future of Memory: Limits and Opportunities. https://doi.org/10.48550/arXiv.2508.20425 https://arxiv.org/abs/2508.20425
Published in arXiv preprint, 2025
The first comprehensive, open-source framework that aligns dynamic, fine-grained workload lifetime profiles with memory device characteristics to enable generation of optimal StRAM memory compositions.
Recommended citation: Peijing Li, Matthew Hung, Yiming Tan, Konstantin Hoßfeld, Jake Cheng Jiajun, Shuhan Liu, Lixian Yan, Xinxin Wang, Philip Levis, H.-S. Philip Wong, and Thierry Tambe. 2025. GainSight: A Unified Framework for Data Lifetime Profiling and Heterogeneous Memory Composition. https://doi.org/10.48550/arXiv.2504.14866 https://arxiv.org/abs/2504.14866
Published in arXiv preprint, 2025
An open-source GCRAM compiler capable of generating GCRAM bank circuit designs and DRC- and LVS-clean layouts for commercially available foundry CMOS.
Recommended citation: Xinxin Wang, Lixian Yan, Shuhan Liu, Luke Upton, Zhuoqi Cai, Yiming Tan, Shengman Li, Koustav Jana, Peijing Li, Jesse Cirimelli-Low, Thierry Tambe, Matthew Guthaus, and H.-S. Philip Wong. 2025. OpenGCRAM: An Open-Source Gain Cell Compiler Enabling Design-Space Exploration for AI Workloads. https://doi.org/10.48550/arXiv.2507.10849 https://arxiv.org/abs/2507.10849
Published in 2023 Global Symposium on Mobility Innovation Presented by Mcity and UMTRI, 2023
Poster presentation proposing a novel protocol for authenticating and securing communication within connected vehicle platoons.
Recommended citation: Peijing Li and Neda Masoud. 2023. A communication protocol for securing connected vehicle platoons using joint hardware-software means. In 6th Student Poster Competition at the CCAT Global Symposium, April 05, 2023. Center for Connected and Automated Transportation, Ann Arbor, MI. Retrieved from https://ccat.umtri.umich.edu/symposium/2023-symposium/#poster https://ccat.umtri.umich.edu/symposium/2023-symposium/#poster