H.-S. Philip Wong

Professor of Electrical Engineering

Willard R. and Inez Kerr Bell Professor in the School of Engineering

Stanford University, Stanford, California 94305, U.S.A.

Address:

Paul G. Allen Building Extension, 312X

Stanford University
Stanford, CA 94305-4075
Email: hspwong@stanford.edu

Phone: +1-650-725-0982

URL: http://web.stanford.edu/~hspwong/

URL: http://nano.stanford.edu

Biography:

H.-S. Philip Wong is the Willard R. and Inez Kerr Bell Professor in the School of Engineering. He received the B.Sc. (Hons.) in 1982 from the University of Hong Kong, the M.S. in 1983 from the State University of New York at Stony Brook, and the Ph.D. in 1988 from Lehigh University, all in electrical engineering. He joined the IBM T. J. Watson Research Center, Yorktown Heights, New York, in 1988. In September, 2004, he joined Stanford University as Professor of Electrical Engineering.

At IBM, he held various positions from Research Staff Member to Manager and Senior Manager. As a Research Staff Member, he made contributions to CCD and CMOS image sensors, double-gate/multi-gate MOSFET, device simulations for advanced/novel MOSFET, strained silicon, wafer bonding, ultra-thin body SOI, extremely short gate FET, germanium MOSFET, carbon nanotube FET, and phase change memory.

While he was Senior Manager, he had the responsibility of shaping and executing IBM’s strategy on nanoscale science and technology as well as exploratory silicon devices and semiconductor technology. During his time at IBM, he managed pathfinding research on high-k/metal gate, strained silicon, alternative channel materials such as Ge and III-V, multi-gate FinFET, ultra-thin SOI – many of these have now become product technology at IBM and Globalfoundries. He was the first engineer to manage R&D in the Physical Sciences department at IBM Research, where he initiated IBM’s impactful R&D on phase change memory and carbon electronics.

Professor Wong’s research aims at translating discoveries in science into practical technologies. His works have contributed to advancements in nanoscale science and technology, semiconductor technology, solid-state devices, and electronic imaging. He explores the use of nano-materials, nanofabrication techniques, and novel device concepts for nanoelectronics systems. Novel devices often enable new concepts in circuit and system designs. His research also includes explorations into circuits and systems that are device-driven.

His present research covers a broad range of topics including carbon electronics, 2D layered materials, wireless implantable biosensors, directed self-assembly, device modeling, brain-inspired computing, non-volatile memory, and monolithic 3D integration.

He is a Fellow of the IEEE and served on the IEEE Electron Devices Society (EDS) as elected AdCom member from 2001 – 2006. He served as the Editor-in-Chief of the IEEE Transactions on Nanotechnology (2005 – 2006), sub-committee Chair of the ISSCC (2003 – 2004), General Chair of the IEDM (2007), and is currently the Chair of the IEEE Executive Committee of the Symposia of VLSI Technology and Circuits. He is the faculty director of the Stanford Non-Volatile Memory Technology Research Initiative (NMTRI), and is the founding Faculty Co-Director of the Stanford SystemX Alliance – an industrial affiliate program focused on building systems.

His academic appointments include the Chair of Excellence of the French Nanosciences Foundation, Guest Professor of Peking University, Honorary Professor of the Institute of Microelectronics of the Chinese Academy of Sciences, visiting Chair Professor of Nanoelectronics of the Hong Kong Polytechnic University, and the Honorary Doctorate degree from the Institut Polytechnique de Grenoble, France. He serves on the advisory boards of Lehigh University, Singapore University of Technology and Design (SUTD), and the Faculty of Engineering of the Chinese University of Hong Kong.