Research Areas

β-Ga2O3 Power Devices

Gallium Oxide(Ga2O3) is an intriguing quasi-2D transparent oxide, among its many forms grown at various temperatures, β-Ga2O3 is the most stable one. It has a large bandgap of 4.8 eV, positioning it well beyond wide band-gap(WBG) semiconductor category into Ultra-WBG materials. SiGeSn doping for β-Ga2O3 enables its n-type conductivity with high activation efficiency, which promises a bright future for it in power electronics field where Silicon Carbide(SiC) and Gallium Nitride(GaN) are dominating both the market and research field. According to Baliga's(Power) Figure of Merit(BFoM), β-Ga2O3 has the one of the highest merit among all the commonly studied WBG materials.

High current/breakdown MOSFETs and diodes are demonstrated in Ga2O3, showing its immense potential for high power applications. RF devices are also being investigated with the hope of achieving high frequency applications. My work is mainly on fabrication and characterization of high breakdown voltage β-Ga2O3 MOSFET. We have demonstrated the world's first Enhancement-Mode β-Ga2O3 MOSFET with 400V Breakdown Voltage which is presented at 2016 Device Research Conference(DRC). And we are continuing working on pushing the boundary of the highest Vbr by using novel power MOSFET deisgns.

Gold Rush for p-type/Current Blocking Layer in β-Ga2O3

The p-type doping in Ga2O3 has long been elusive and a pain point in every researcher's heart. Among the very few disadvantages of this material, the lack of CBL is the only one that is prohibiting the development of vertical devices, which is essential for the prospect of Ga2O3. Although theoretical calculations predict self-trapping holes in valance band only, thus no p type conduction, the search for an effective current blocking layer has never stopped. Slowly, people have found that Mg and N could be used to compensate electrons, shining light into this unknown darkness. The hunt for effective p-type doping for Ga2O3 has just started…

GaN Vertical Power PiN Diodes

Under ARPA-E Swtich/OPEN+ programma, an ambitious plan to fabricate a 20kV avalanche capable diode is underway. One of the critical challenges is to design a proper edge termination for such a vertical PIN diode. My colleagues and I at Stanford have tested and developed novel edge termination techniques taking advantage of shallow angle bevel etch, Spin-on-glass field plating, and hydrogen passivation of Mg p-layer to address this task. Near 3kV avalanche was achieved with various designs and their advantages and drawbacks were studied in detail.

β-Ga2O3 Interface Characterizations

We are the first group to use Atomic Layer Deposited(ALD) SiO2 as gate oxide for β-Ga2O3 MOSFET. It turns out that the conduction band off-set at SiO2/β-Ga2O3 interface is more than twice than that of Al2O3/β-Ga2O3. This helps to reduce the off-state gate leakage current, thus increases the efficiency, breakdown rating and high temperature stability of the device.

We also investigated the interface trap density(Dit) of SiO2/β-Ga2O3 interface. It's vital to understand the Dit of the oxide/semiconductor interface of the MOSFET under inverstigation, because it can affact threshold voltage, subthreshold slope immensely. A moderate value in the mid of 1011/cm3 is extracted for a non-treated surface. This result is obtained from Terman method and Conductance method, both of the methods have it's shortcomings. Terman method is the most unreliable one because it relies on an accurate theoratical CV curve that's highly uncertain due to the effects of doping and various other traps. Conductance although is the most accurate method, also sufferes from very limited energy detection range and requires immense amount of data processing. This is simply because the useable data(conductance peak) does not exist in a lot of measurements and even the peak is in the data, sometimes, it's hidden and will only be revealed after data processing(frequency normalization), thus requiring real time data processing to help efficiently locate the peak. Another trait of it is that only fast traps respond to conductance measurement, thus might under-estimate the Dit compared to CV methods. A nice balance between the big uncertainty of Terman's method and the sophistication of conductance method is the quasi-static CV method. It covers a wider range and can probe upto 2eV at 300C. It only requires two CV curve for extraction. Nevertheless, both quasi-static CV and conductance method require low-leakage oxide, otherwise all useable signal will be flooded by leakage current, rendering absolutely no usable data at all. Further investigations using these techniques into deeper energy levels are also underway.

Low Resistance Ohmic Contact to β-Ga2O3

Forming a low resistance ohmic contact is critical to the success of a WBG power device. Due to the wide-bandgap nature, it's relatively hard to get an ohmic contact as it always presents a higher schottky barrier to any metal. Higher doping at the access region(Source/Drain) is always a solution to the problem, but requires complicated design and processes that is laborious for fast prototyping. We have demonstrated a novel doping technique using highly Sn doped Spin-on-Glass(SOG) as the dopant source followed by a high temprature annealing as drive-in diffusion method to achieve the same doping effect under contact region. This method proved to be much easier and cheaper to implement in MOSFET process flow and gives good result.