Summary

The IGBT model has an efficiency of 97.5%. After analyzing and optimizing the model for SiC, the efficiency is 98.8% for an improvement of ~1.3%.
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The original topology had an efficiency of 97.4% for a 5kW inverter

• This is taking into consideration all losses being an actual prototype
• Losses we calculated only accounted for the switching, conduction, and parasitic losses
• The parasitics in our model may be on the larger side, which potentially accounts for greater overall losses in a real device

Magnetics will also play a role in the losses

• We ran both circuits at frequencies up to 100 kHz and saw that switching losses stay about the same, while conduction  losses decrease for both the IGBT and SiC models
• Given this, we can run the model with much smaller magnetic components, thereby further reducing the overall losses

​Despite this, we’ve demonstrated SiC FETs can slightly decrease the losses of the modeled transformerless inverter.

Difficulties & Recommendations

Determine which parasitic elements to model in the circuit and a reasonable value from datasheets and simulations.

• ​Reference datasheets and electrical engineering forums to find recommended values

Reduce dipping in the input source by adding bypass capacitance. The fluctuations are shunted by the capacitor across the source.

• Bypass capacitances of 1u and 100n should be sufficient for most applications.

Speed up SPICE simulations by adjusting the optimization settings and options and also by adding in parasitics into the model.

• The following .options command was used:
  • ​.options MAXORD=1 CSHUNT=1f METHOD=GEAR ABSTOL=1e-6 CHGTOL=1e-12 GMIN=1e-9 ITL1=1000 ITL2=1000 ITL4=1000 ITL6=1000 RELTOL= 0.001 VNTOL=1e-3 NOOPITER

Add dead time to voltage pulses of switching elements.

• ​Given a switching device A and B, use the following to configure a dead time. The riseFall time of this voltage source should equal the deadtime of the device so that the switches flip on/off instantaneously.
  • ​VgA gA 0 PULSE({OFF} {ON} {deadtime} {riseFall} {riseFall} {tonA} {period})
  • VgB gB 0 PULSE({ON} {OFF} 0 {riseFall} {riseFall} {tonB} {period})

Future Work

• Estimating loss in magnetic components
• Deriving PWM control for switches
• Trying topology with other IGBTs, other SiC FETs, and GaN FETs
• Investigation of the other transformerless inverter topologies below

          1. H5 inverter
          2. Inverter with two paralleled buck converters
          3. High-efficiency inverter with H6-type configuration
          4. Karschny inverter

References

EE255 Class Notes, Professor Dally and Course Staff.
Transformerless Inverters for Single-Phase Photovoltaic Systems, IEEE Power Electronics, Roberto Gonzalez, et al.
Improved Transformerless Inverter With Common-Mode Leakage Current Elimination For a Photovoltaic Grid-Connected Power System, IEEE Power Electronics, Bo Yang, et al.