Publications
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"DRAF: A Low-Power DRAM-Based Reconfigurable Acceleration Fabric",
IEEE Micro Special Issue on Top Picks from the Computer Architecture Conferences, vol. 37, issue 3, 06/2017.
Download: paper (418.24 KB)
"Plasticine: A Reconfigurable Architecture For Parallel Patterns",
ISCA '17: 44th International Symposium on Computer Architecture, Toronto, Canada, 06/2017.
Abstract
Download: paper (1.53 MB)
"Automatic Generation of Efficient Accelerators for Reconfigurable Hardware",
The 43rd International Symposium on Computer Architecture (ISCA), Seoul, South Korea, 06/2016.
Abstract
Download: paper (2.77 MB)
"DRAF: A Low-Power DRAM-based Reconfigurable Acceleration Fabric",
The 43rd International Symposium on Computer Architecture (ISCA), Seoul, South Korea, 06/2016.
Download: paper (1.02 MB); slides (876.98 KB)
"Block-aware instruction set architecture",
ACM Trans. Archit. Code Optim., vol. 3, no. 3, New York, NY, USA, ACM, pp. 327–357, 2006.
Download: p327-zmily.pdf (526.99 KB)