Publications
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"An Analysis of Interconnection Networks for Large Scale Chip-Multiprocessors",
ACM Transactions on Architecture and Code Optimization (TACO), vol. 7, no. 1, 04/2010.
Download: paper (1.7 MB)
"DRAF: A Low-Power DRAM-Based Reconfigurable Acceleration Fabric",
IEEE Micro Special Issue on Top Picks from the Computer Architecture Conferences, vol. 37, issue 3, 06/2017.
Download: paper (418.24 KB)
"DRAF: A Low-Power DRAM-based Reconfigurable Acceleration Fabric",
The 43rd International Symposium on Computer Architecture (ISCA), Seoul, South Korea, 06/2016.
Download: paper (1.02 MB); slides (876.98 KB)
"Dune: Safe User-level Access to Privileged CPU Features",
Proceedings of the 10th USENIX Conference on Operating Systems Design and Implementation, Berkeley, CA, USA, USENIX Association, pp. 335–348, 2012.
Download: paper (251.6 KB)
"Evaluating Bufferless Flow Control for On-Chip Networks",
Proceedings of the 4th ACM/IEEE international symposium on Networks-on-Chip (NOCS-2010), 05/2010.
Download: paper (158.51 KB); slides (897.85 KB)
"Hardware acceleration of transactional memory on commodity systems.",
ASPLOS: ACM, pp. 27-38, 2011.
Download: paper (1.22 MB)
"Making nested parallel transactions practical using lightweight hardware support.",
ICS: ACM, pp. 61-71, 2010.
Download: paper (985.03 KB)
"The Stream Virtual Machine",
Proceedings of the 13th International Conference on Parallel Architectures and Compilation Techniques (PACT), pp. 267–277, 9/2004.
"Towards Energy-proportional Datacenter Memory with Mobile DRAM",
Proceedings of the 39th Annual International Symposium on Computer Architecture, Washington, DC, USA, IEEE Computer Society, pp. 37–48, 2012.
Download: paper (5.08 MB)